A 1.2V 10μW NPN-based temperature sensor in 65nm CMOS with an inaccuracy of ±0.2°C (3σ) from -70°C to 125°C

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 53, Issue , 2010, Pages 312-313

  Sebastiano, Fabio ^a,b   Breems, Lucien J ^a   Makinwa, Kofi A A ^b   Drago, Salvatore ^a,c   Leenaerts, Domine M W ^a   Nauta, Bram ^c  

^a NXP SEMICONDUCTORS   (Netherlands)

^b DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

^c UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS PROCESSS; CORRELATED DOUBLE SAMPLING; DEEP SUB-MICRON; DYNAMIC ELEMENT MATCHING; DYNAMIC TECHNIQUES; N-P-N TRANSISTORS; ROOM TEMPERATURE; SENSING ELEMENTS;

TEMPERATURE SENSORS;

CMOS INTEGRATED CIRCUITS;

EID: 77952141870     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2010.5433895     Document Type: Conference Paper

References (4)

1. D. Duarte et al., "Temperature Sensor Design in High Volume Manufacturing 65nm CMOS Digital Process," IEEE Custom Integrated Circuits Conf., pp. 221- 224, Sep. 2007.
2. Y.W. Li et al., "A 1.05V 1.6mW 0.45°C 3σ-Resolution ΔΣ-Based Temperature Sensor with Parasitic-Resistance Compensation in 32nm CMOS," ISSCC Dig. Tech. Papers, pp. 340-341, Feb. 2009.
3. M.A.P. Pertijs et al., "A CMOS Temperature Sensor with a 3σ Inaccuracy of ±0.1°C from -55°C to 125°C," ISSCC Dig. Tech. Papers, pp. 238-239, Feb. 2005.
4. A.L. Aita et al., "A CMOS Smart Temperature Sensor with a Batch-Calibrated Inaccuracy of ±0.25°C (3σ) from -70°C to 130°C," ISSCC Dig. Tech. Papers, pp. 342-343, Feb. 2009.