|
Volumn 57, Issue 2 PART 1, 2010, Pages 406-411
|
Architecture and implementation of the front-end electronics of the time projection chambers in the T2K experiment
a
CEA SACLAY
(France)
|
Author keywords
Fast networks; FPGA; Front end electronics; Switched capacitor arrays
|
Indexed keywords
ANALOG MEMORIES;
BURSTINESS;
DETECTOR CHANNELS;
DIGITAL MEMORY;
FRONT END ELECTRONICS;
GASEOUS DETECTORS;
GIGABIT ETHERNET;
KEY ELEMENTS;
LOW POWER BUDGET;
MICRO PATTERN;
MULTI-GIGABIT OPTICAL LINKS;
NEUTRINO OSCILLATIONS;
REAL TIME;
SWITCHED CAPACITOR ARRAY;
TIME PROJECTION CHAMBERS;
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
CAPACITANCE;
CAPACITORS;
CONCENTRATION (PROCESS);
DETECTORS;
ELEMENTARY PARTICLES;
ETHERNET;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
PARTICLE DETECTORS;
VARIABLE FREQUENCY OSCILLATORS;
SWITCHING CIRCUITS;
|
EID: 77951175778
PISSN: 00189499
EISSN: None
Source Type: Journal
DOI: 10.1109/TNS.2009.2035313 Document Type: Conference Paper |
Times cited : (24)
|
References (8)
|