Processor customization for software implementation of the AES algorithm for wireless sensor networks

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 5953 LNCS, Issue , 2010, Pages 326-335

  Suárez, Néstor ^a   Callicó, Gustavo M ^a   Sarmiento, Roberto ^a   Santana, Octavio ^b   Abbo, Anteneh A ^b  

^a UNIVERSITY OF LAS PALMAS DE GRAN CANARIA   (Spain)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

Advanced Encryption Standard (AES); Application specific integrated circuits (ASIP); Code optimization; Processor customization; Wireless Sensor Networks (WSN)

Indexed keywords

ADVANCED ENCRYPTION STANDARD; AES ALGORITHMS; APPLICATION SPECIFIC PROCESSORS; BLOCK CIPHERS; CODE OPTIMIZATION; CODE PERFORMANCE; CYCLE COUNT; ENCRYPTION ALGORITHMS; ENCRYPTION AND DECRYPTION; LOW MEMORY; LOW POWER; SOFTWARE IMPLEMENTATION; WIRELESS SENSOR NODE;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER SOFTWARE; CRYPTOGRAPHY; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUITS; NANOTECHNOLOGY; NETWORK SECURITY; OPTIMIZATION; SENSOR NETWORKS; SENSOR NODES; TECHNICAL PRESENTATIONS; TELECOMMUNICATION EQUIPMENT; TIME MEASUREMENT; TIMING CIRCUITS;

WIRELESS SENSOR NETWORKS;

EID: 77951143300     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-11802-9_37     Document Type: Conference Paper

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