CMOS compatible silicon etched V-grooves integrated with a SOI fiber coupling technique for enhancing fiber-to-chip alignment

IEEE International Conference on Group IV Photonics GFP

Volumn , Issue , 2009, Pages 148-150

  Galan, J V ^a   Sanchis, P ^a   Marti J ^a   Marx, S ^b   Schroder H ^b   Mukhopadhyay, B ^c   Tekin, T ^c   Selvaraja, S ^d   Bogaerts, W ^d   Dumon, P ^d   Zimmermann, L ^c  

^a UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

^b FRAUNHOFER IZM   (Germany)

^c TECHNISCHE UNIVERSITÄT BERLIN   (Germany)

^d GHENT UNIVERSITY   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP ALIGNMENT; CMOS COMPATIBLE; COUPLING LOSS; FIBER COUPLINGS; POLARIZATION-INSENSITIVE; SILICON PHOTONICS; V GROOVES;

CMOS INTEGRATED CIRCUITS;

EID: 77951086314     PISSN: 19492081     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/GROUP4.2009.5338334     Document Type: Conference Paper

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