Efficient architectures for elliptic curve cryptography processors for RFID

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2009, Pages 372-377

  Leinweber, Lawrence ^a   Papachristou, Christos ^a   Wolff, Francis G ^a  

^a CASE WESTERN RESERVE UNIVERSITY   (United States)

Author keywords

Elliptic curve cryptography; RFID; Security

Indexed keywords

90 NM TECHNOLOGY; BIT-SERIAL MULTIPLIERS; CIRCUIT ELEMENTS; CLOCK CYCLES; CRYPTOGRAPHIC FUNCTIONS; DIE AREA; ECONOMIC CONSTRAINTS; EFFICIENT ARCHITECTURE; ELLIPTIC CURVE; ELLIPTIC CURVE CRYPTOGRAPHY; ELLIPTIC CURVE CRYPTOGRAPHY PROCESSORS; ELLIPTIC CURVE POINT MULTIPLICATIONS; GALOIS FIELDS; LINE OF SIGHT; LOW POWER; POWER CONSUMPTION; PRODUCT IDENTIFICATION; RF-ID TAGS; RFID SECURITY; SIDE CHANNEL ATTACK;

DESIGN; GEOMETRY; MULTIPLYING CIRCUITS; NANOTECHNOLOGY; PUBLIC KEY CRYPTOGRAPHY; RADIO NAVIGATION; SUPPLY CHAINS; SYNTHESIS (CHEMICAL);

COMPUTER ARCHITECTURE;

EID: 77950990187     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2009.5413128     Document Type: Conference Paper

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