-
1
-
-
0029637354
-
The algorithmic analysis of hybrid systems
-
Hybrid Systems
-
R. Alur, C. Courcoubetis, N. Halbwachs, T. A. Henzinger, P. H. Ho, X. Nicollin, A. Olivero, J. Sifakis, and S. Yovine. The algorithmic analysis of hybrid systems. Theoretical Computer Science, 138(1):3-34, 1995. Hybrid Systems.
-
(1995)
Theoretical Computer Science
, vol.138
, Issue.1
, pp. 3-34
-
-
Alur, R.1
Courcoubetis, C.2
Halbwachs, N.3
Henzinger, T.A.4
Ho, P.H.5
Nicollin, X.6
Olivero, A.7
Sifakis, J.8
Yovine, S.9
-
2
-
-
0000050873
-
Hybrid automata: An. algorithmic approach to the specification and verification of hybrid systems
-
Hybrid Systems Robert L. Grossman, Anil. Nerodě, Anders P Ravn, and Hans Rischel, editors, Springer
-
R. Alur, C. Courcoubetis, T. A. Henzinger, and P.-H. Ho. Hybrid automata: An. algorithmic approach to the specification and verification of hybrid systems. In Robert L. Grossman, Anil. Nerodě, Anders P Ravn, and Hans Rischel, editors, Hybrid Systems, volume 736 of Lecture Notes in Computer Science, pages 209-229. Springer, 1992.
-
(1992)
Lecture Notes in Computer Science
, vol.736
, pp. 209-229
-
-
Alur, R.1
Courcoubetis, C.2
Henzinger, T.A.3
Ho, P.-H.4
-
3
-
-
84958037228
-
UPPAAL a Tool Suite for Automatic Verification of Real-Time Systems. in
-
Springer-Verlag, October
-
J. Bengtsson, K. G. Larsen, F. Larsson, P. Pettersson, and W. Yi. UPPAAL a Tool Suite for Automatic Verification of Real-Time Systems. In Proc. of Workshop on Verification and Control of Hybrid Systems III, number 1066 in Lecture Notes in Computer Science, pages 232-243. Springer-Verlag, October 1995.
-
(1995)
Proc. of Workshop on Verification and Control of Hybrid Systems III, Number 1066 in Lecture Notes in Computer Science
, pp. 232-243
-
-
Bengtsson, J.1
Larsen, K.G.2
Larsson, F.3
Pettersson, P.4
Yi, W.5
-
5
-
-
84944099472
-
Timing assumptions and verification of finite-state concurrent systems
-
Joseph Sifakis, editor Lecture Notes in. Computer Science, pages Springer
-
D. L. Dill. Timing assumptions and verification of finite-state concurrent systems. In Joseph Sifakis, editor, Proc. Automatic Verification Methods for Finite-State Systems, volume 407 of Lecture Notes in. Computer Science, pages 197-212. Springer, 1989.
-
(1989)
Proc. Automatic Verification Methods for Finite-State Systems
, vol.407
, pp. 197-212
-
-
Dill, D.L.1
-
6
-
-
45849085781
-
A survey of automated techniques for formal, software verification
-
July
-
V. D'Silva, D. Kroening, and G. Weissenbacher. A survey of automated techniques for formal, software verification. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 27(7):1165-1178, July 2008.
-
(2008)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
, vol.27
, Issue.7
, pp. 1165-1178
-
-
D'Silva, V.1
Kroening, D.2
Weissenbacher, G.3
-
7
-
-
70349302162
-
Volatiles are miscompiled, and what to do about it
-
New York, NY, USA, ACM
-
E. Eide and J. Regehr. Volatiles are miscompiled, and what to do about it. In EMSOFT '08: Proceedings of the 7th ACM international conference on Embedded software, pages 255-264, New York, NY, USA, 2008. ACM.
-
(2008)
EMSOFT '08: Proceedings of the 7th ACM International Conference on Embedded Software
, pp. 255-264
-
-
Eide, E.1
Regehr, J.2
-
8
-
-
0000820904
-
Interval arithmetic: From principles to implementation
-
T. Hickey, Q. Ju, and M. H. Van Emden. Interval arithmetic: From principles to implementation. J. ACM, 48(5): 1038-1068, 2001.
-
(2001)
J. ACM
, vol.48
, Issue.5
, pp. 1038-1068
-
-
Hickey, T.1
Ju, Q.2
Van Emden, M.H.3
-
9
-
-
0026121769
-
Software requirements analysis for real-time process-control systems
-
M.S. Jaffe, N.G. Leveson, M.P.E. Heimdahl, and B.E. Melhart. Software requirements analysis for real-time process-control systems. IEEE Transactions on Software Engineering, 17(3):241-258, 1991.
-
(1991)
IEEE Transactions on Software Engineering
, vol.17
, Issue.3
, pp. 241-258
-
-
Jaffe, M.S.1
Leveson, N.G.2
Heimdahl, M.P.E.3
Melhart, B.E.4
-
10
-
-
38149133981
-
Verification of analog/mixed-signal circuits using labeled hybrid Petri, nets
-
IEEE Computer Society Press
-
S. Little, N. Seegmiller, D. Walter, C. Myers, and T. Yoneda. Verification of analog/mixed-signal circuits using labeled hybrid Petri, nets. In Proc. International Conference on Computer Aided Design (ICCAD), pages 275-282. IEEE Computer Society Press, 2006.
-
(2006)
Proc. International Conference on Computer Aided Design (ICCAD)
, pp. 275-282
-
-
Little, S.1
Seegmiller, N.2
Walter, D.3
Myers, C.4
Yoneda, T.5
-
11
-
-
38149113501
-
Analog/mixed-signal circuit verification using models generated from simulation traces
-
Kedar S. Namjoshi, Tomohiro Yoneda, Teruo Higashino, and Yoshio Okamura, editors, Lecture Notes in Computer Science, Springer
-
S. Little, D. Walter, and C. Myers. Analog/mixed-signal circuit verification using models generated from simulation traces. In Kedar S. Namjoshi, Tomohiro Yoneda, Teruo Higashino, and Yoshio Okamura, editors, Automated Technology for Verification and Analysis (ATVA), volume 4762 of Lecture Notes in Computer Science, pages 114-128. Springer, 2007.
-
(2007)
Automated Technology for Verification and Analysis (ATVA)
, vol.4762
, pp. 114-128
-
-
Little, S.1
Walter, D.2
Myers, C.3
-
13
-
-
56749130060
-
Verification of analog/mixed-signal circuits using symbolic methods
-
D. Walter, S. Little, C. Myers, N. Seegmiller, and T. Yoneda. Verification of analog/mixed-signal circuits using symbolic methods. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 27(12):2223-2235, 2008.
-
(2008)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
, vol.27
, Issue.12
, pp. 2223-2235
-
-
Walter, D.1
Little, S.2
Myers, C.3
Seegmiller, N.4
Yoneda, T.5
-
15
-
-
38149014209
-
Symbolic model checking of analog/mixed-signal circuits
-
David Walter, Scott Little, Nicholas Seegmiller, Chris J. Myers, and Tomohiro Yoneda. Symbolic model checking of analog/mixed-signal circuits. In Proc. of Asia and South Pacific Design Automation Conference (ASPDAC), pages 316-323, 2007.
-
(2007)
Proc. of Asia and South Pacific Design Automation Conference (ASPDAC), Pages
, pp. 316-323
-
-
Walter, D.1
Little, S.2
Seegmiller, N.3
Myers, C.J.4
Yoneda, T.5
|