Hardware implementation of matrix inversion for raptor decoder on embedded system

Midwest Symposium on Circuits and Systems

Volumn , Issue , 2009, Pages 687-690

  Mladenov, Todor ^a   Nooshabadi, Saeid ^a   Kim, Kiseon ^a  

^a Gwangju Institute of Science and Technology (GIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

DEDICATED HARDWARE; EMBEDDED PROCESSORS; ENERGY PROFILE; HARDWARE IMPLEMENTATIONS; MATRIX INVERSIONS; MOBILE MULTIMEDIA CONTENT; RAPTOR CODES; SOFTWARE IMPLEMENTATION; SYSTEM ON A CHIP; TIMING PERFORMANCE;

DECODING; ENERGY DISSIPATION; HARDWARE;

EMBEDDED SYSTEMS;

EID: 77950654374     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MWSCAS.2009.5236003     Document Type: Conference Paper

References (6)

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3. 3GPP TS 26.346, Technical Specification Group Services and System Aspects; Multimedia Broadcast/Multicast Service (MBMS); Protocols and codecs, 3GPP Technical Specification, Rev. V7.4.1, Jun. 2007.
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5. T. Mladenov, S. Nooshabadi, A. Dassatti, and K. Kim, "Analysis and implementation of raptor codes on embedded system," in Global Telecommunications Conference. GLOBECOM '09. IEEE, 2009.
6. D. Parkinson and M. Wunderlich, "A compact algorithm for gaussian elimination over GF(2) implemented on highly parallel computers," Parallel Computing, vol. 1, no. 1, pp. 65-73, Aug. 1984.