Evaluation of multithreaded processors and thread-switch policies

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1336, Issue , 1997, Pages 75-90

  Eickemeyer, Richard J ^a   Johnson, Ross E ^a   Kunkel, Steven R ^a   Lim, Beng Hong ^b   Squillante, Mark S ^b   Eric Wu, C ^b  

^a IBM   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

RECONFIGURABLE HARDWARE;

COARSE-GRAINED; MEMORY ACCESS LATENCY; MULTI-THREADING; MULTITHREADED PROCESSORS; ONLINE TRANSACTION PROCESSING; THREAD SWITCH; TWO-LEVEL CACHES; UNIPROCESSORS;

MULTITASKING;

EID: 77950618712     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/BFb0024207     Document Type: Conference Paper

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