CUDA accelerated LTL model checking

Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS

Volumn , Issue , 2009, Pages 34-41

  Barnat, Jiří ^a   Brim, Luboš ^a   Češka, Milan ^a   Lamr, Tomáš ^a  

^a MASARYK UNIVERSITY   (Czech Republic)

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE ARCHITECTURE; HARDWARE PLATFORM; LTL MODEL-CHECKING; MANY-CORE; MATRIX-VECTOR PRODUCTS; TECHNOLOGICAL DEVELOPMENT; VERIFICATION PROCESS;

COMPUTER ARCHITECTURE; COMPUTER GRAPHICS EQUIPMENT; COMPUTER HARDWARE; COMPUTER SYSTEMS; TECHNOLOGICAL FORECASTING;

MODEL CHECKING;

EID: 77949635149     PISSN: 15219097     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICPADS.2009.50     Document Type: Conference Paper

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