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Volumn 2, Issue , 1999, Pages 789-794

Efficient drivers, receivers and repeaters for low power CMOS bus architectures

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DELAY CIRCUITS; INTEGRATED CIRCUIT INTERCONNECTS; LOW POWER ELECTRONICS;

EID: 77949625515     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.1999.813227     Document Type: Conference Paper
Times cited : (20)

References (11)
  • 6
    • 0000586481 scopus 로고
    • Low-power CMOS/BiCMOS drivers and receivers for on-chip interconnects
    • June
    • Bellaouar, I. S. Abu-Khater, and M. I. Elmasry, "Low-Power CMOS/BiCMOS Drivers and Receivers for on-Chip Interconnects", IEEE Journal of Solid-State Circuits, vol. 30, pp. 696-700, No. 6, June 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , Issue.6 , pp. 696-700
    • Bellaouar, I.1    Abu-Khater, S.2    Elmasry, M.I.3
  • 7
    • 0029289258 scopus 로고
    • An asymptotically zero power charge-recycling bus architecture for battery-operated ultrahigh data rate ULSI's
    • April
    • H. Yamauchi, H. Akamatsu, T. Fujita, "An Asymptotically Zero Power Charge-recycling Bus Architecture for Battery-operated Ultrahigh Data Rate ULSI's", IEEE Journal of Solid-State Circuits, vol. 30, pp. 423-43l, April 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , pp. 423-43l
    • Yamauchi, H.1    Akamatsu, H.2    Fujita, T.3
  • 10
    • 0000541151 scopus 로고
    • Accurate simulation of power dissipation in VLSI circuits
    • Oct.
    • S. M. Kang, "Accurate Simulation of Power Dissipation in VLSI Circuits", IEEE J. Solid State Circuits, vol. SC-21, no. 5, pp.889-891, Oct. 1986.
    • (1986) IEEE J. Solid State Circuits , vol.SC-21 , Issue.5 , pp. 889-891
    • Kang, S.M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.