Hardware implementation of mapper for faster-than-Nyquist signaling transmitter

2009 NORCHIP

Volumn , Issue , 2009, Pages

  Dasalukunte, Deepak ^a   Rusek, Fredrik ^a   Öwall, Viktor ^a   Ananthanarayanan, Karthik ^b   Kandasamy, Murali ^b  

^a LUND UNIVERSITY   (Sweden)

^b NATIONAL INSTITUTE OF TECHNOLOGY   (India)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK CYCLES; HARDWARE IMPLEMENTATIONS; INTERMEDIATE RESULTS; LOOK UP TABLE; MATLAB MODELS; NYQUIST; RANDOM ACCESS MEMORIES; STANDARD CELL; SUB-CARRIERS; WRITE-BACK;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ELECTRIC BATTERIES; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; MATLAB; RANDOM ACCESS STORAGE; SIGNALING; TABLE LOOKUP;

TRANSMITTERS;

EID: 77949594500     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NORCHP.2009.5397801     Document Type: Conference Paper

References (8)

1. J. E. Mazo, "Faster-than-Nyquist signaling," Bell System Technical Journal, vol. 54, pp. 1451-1462, Oct 1975.
2. F. Rusek and J. Anderson, "Multistream faster than nyquist signaling," Communications, IEEE Transactions on, vol. 57, no. 5, pp. 1329-1340, May 2009.
3. D. Dasalukunte, F. Rusek, J. B. Anderson, and V. Owall, "A Transmitter Architecture for Faster-than-Nyquist Signaling Systems," in Proc. IEEE Intl. Symp. Circuits and Syst., Taipei, Taiwan, May 2009.
4. S. Benedetto, D. Divsalar, G. Montorsi, and F. Pollara, "Serial concatenation of interleaved codes: performance analysis, design, and iterative decoding," Information Theory, IEEE Transactions on, vol. 44, no. 3, pp. 909-926, May 1998.
5. F. Rusek, "Partial Response and Faster-than-Nyquist Signaling," Ph.D. dissertation, Dept of Electrical and Information Technology, Lund Univ, 2007.
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