Area, speed and power measurements of FPGA-based complex orthogonal space-time block code channel encoders

International Journal of Electronics

Volumn 97, Issue 1, 2010, Pages 31-43

  Passas, Georgios ^a   Freear, Steven ^a   Fawcett, Darren ^b  

^a UNIVERSITY OF LEEDS   (United Kingdom)

^b Pace Plc   (United Kingdom)

Author keywords

Channel coding; FPGA implementation; Orthogonal codes; Space time block coding; VHDL design

Indexed keywords

ALAMOUTI; CHANNEL CODING ALGORITHMS; DIVERSITY GAIN; ENCODER DESIGN; FPGA IMPLEMENTATIONS; HARDWARE DESCRIPTION LANGUAGES; HARDWARE RESOURCES; HIGH-SPEED INTEGRATED CIRCUITS; ORTHOGONAL CODE; ORTHOGONAL SPACE-TIME BLOCK CODES; POWER CONSUMPTION; POWER MEASUREMENT; SPACE TIME BLOCK CODING; SPACE TIME CODING; SPACE-TIME BLOCK CODE; TRANSMISSION MATRIX; TRANSMIT DIVERSITY TECHNIQUES; VHDL DESIGN; WIRELESS COMMUNICATIONS; WIRELESS SYSTEMS;

ANTENNAS; BLOCK CODES; CHANNEL CODING; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DESIGN; ENCODING (SYMBOLS); FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INFORMATION THEORY; MODULATION; SPACE TIME ADAPTIVE PROCESSING;

SPACE-TIME BLOCK CODING (STBC);

EID: 77949497376     PISSN: 00207217     EISSN: 13623060     Source Type: Journal    
DOI: 10.1080/00207210902894787     Document Type: Article

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