A comparison of MPCP and MSRP when sharing resources in the Janus multiple-processor on a chip platform

Real-Time Technology and Applications - Proceedings

Volumn , Issue , 2003, Pages 189-198

  Gai, Paolo ^a   Di Natale, Marco ^a   Lipari, Giuseppe ^a   Ferrari, Alberto ^b   Gabellini, Claudio ^c   Marceca, Paolo ^c  

^a SCUOLA SUPERIORE SANT ANNA   (Italy)

^b PARADES   (Italy)

^c Magneti Marelli SpA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE DESIGNS; AUTOMOTIVE APPLICATIONS; COMMUNICATION AND SYNCHRONIZATIONS; EXPERIMENTAL EVALUATION; MULTIPROCESSOR-ON-A-CHIP; PRIORITY CEILING PROTOCOLS; RATE MONOTONIC SCHEDULING ALGORITHMS; STACK RESOURCE POLICIES;

APPLICATION PROGRAMS; MULTIPROCESSING SYSTEMS; MULTITASKING; RANDOM ACCESS STORAGE; SCHEDULING; SCHEDULING ALGORITHMS;

COMPUTER ARCHITECTURE;

EID: 77649311841     PISSN: 10801812     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTTAS.2003.1203051     Document Type: Conference Paper

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