Atomic-layer-deposited Al2O3 as gate dielectrics for graphene-based devices

ECS Transactions

Volumn 19, Issue 5, 2009, Pages 225-230

  Lee, B ^a   Mordi, G ^a   Park, T J ^a   Goux, L ^a   Chabal, Y J ^a   Cho, K J ^a   Vogel, E M ^a   Kim, M J ^a   Colombo, L ^b   Wallace, R M ^a   Kim, J ^a  

^a The University of Texas at Dallas   (United States)

^b TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINA; ALUMINUM OXIDE; CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; GATE DIELECTRICS; GRAPHENE; GRAPHENE DEVICES; HIGH RESOLUTION TRANSMISSION ELECTRON MICROSCOPY;

ATOMIC LAYER DEPOSITED; C-V MEASUREMENT; DEFECT CONCENTRATIONS; DIELECTRIC LAYER; HIGHLY ORIENTED PYROLYTIC GRAPHITE; SELECTIVE DEPOSITION; TRIMETHYLALUMINUM; TWO-DIMENSIONAL GROWTH;

ATOMIC LAYER DEPOSITION;

EID: 77149120156     PISSN: 19385862     EISSN: 19386737     Source Type: Conference Proceeding    
DOI: 10.1149/1.3119546     Document Type: Conference Paper

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