A 45nm 8-core enterprise Xeon® processor

Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009

Volumn , Issue , 2009, Pages 9-12

  Rusu, Stefan ^a   Tam, Simon ^a   Muljono, Harry ^a   Ayers, David ^a   Chang, Jonathan ^a   Varada, Raj ^a   Ratta, Matt ^a   Vora, Sujai ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

LONG CHANNEL DEVICES; MANUFACTURING YIELD; METAL PROCESS; MULTIPLE PRODUCTS; POWER CONSUMPTION; POWER CONVERSION EFFICIENCIES; SILICON DIE; SLEEP MODE; VOLTAGE DOMAINS;

CONVERSION EFFICIENCY; ELECTRIC POTENTIAL; VOLTAGE REGULATORS;

METAL RECOVERY;

EID: 76249108119     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2009.5357230     Document Type: Conference Paper

References (4)

1. K. Mistry, et al., "A 45nm Logic Technology with High-k+ Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm. Dry Patterning, and 100% Pb-free Packaging", IEDM Tech. Digest, December 2007.
2. S. Rusu, et al., "A 45nm. 8-Core Enterprise Xeon.® Processor", ISSCC Tech. Digest, February 2009.
3. F. Hamzaoglu, et al., "A. 153Mb-SRAM Design with. Dynamic Stability Enhancement and Leakage Reduction in 45nm High-K Metal-Gate CMOS Technology ", ISSCC Tech. Digest, February 2008.
4. R. Kumar, G. Hinton, "Nehalem: a family of 45 nm IA processors", ISSCC Tech. Digest, February 2009.