FPGA floating point datapath compiler

Proceedings - IEEE Symposium on Field Programmable Custom Computing Machines, FCCM 2009

Volumn , Issue , 2009, Pages 259-262

  Langhammer, Martin ^a   VanCourt, Tom ^b  

^a ALTERA CORPORATION   (United Kingdom)

^b ALTERA CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION EXAMPLES; DATA INTEGRITY; DATA PATHS; DATA-FLOW GRAPHS; DATA-PATH ARCHITECTURE; FLOATING POINTS; FUNCTIONAL EFFICIENCY; MATRIX CALCULATIONS;

COMPUTERS; DATA FLOW ANALYSIS; DIGITAL ARITHMETIC; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GRAPHIC METHODS; PROGRAM COMPILERS;

COMPUTER ARCHITECTURE;

EID: 74349114314     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2009.54     Document Type: Conference Paper

References (6)

1. M. Langhammer, "Floating Point Datapath Synthesis for FPGAs", Proc. Field Programmable Logic Conf., 2008
2. S. Demirsoy and M. Langhammer, "Fused Datapath Floating Point Implementation of Cholesky Decomposition", ACM/SIGDA International Symposium of Field Programmable Gate Arrays, 2009
3. M. Chiu, M.C. Herbordt, and M. Langhammer, "Performance Potential of Molecular Dynamics Simulations on High Performance Computing Systems", Proc. International Workshop of High Performance Reconfigurable Computing Technology and Applications, 2008
4. Xilinx Inc., "Xilinx Floating Point Operators v4.0", www.xilinx.com/products/ipcenter/FLOATING-PT.htm
5. IEEE Standard for Binary Floating-Point Arithmetic, IEEE Standard 754-1985, 1985
6. Altera Corporation, "Stratix III Device Handbook, Volume 1", www.altera.com