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Volumn , Issue , 2009, Pages 531-534

Nonvolatile SRAM (NV-SRAM) using functional MOSFET merged with resistive switching devices

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT OPERATION; CURRENT DRIVES; MOS-FET; MOSFETS; NON-POLAR; NON-VOLATILE; RECONFIGURABLE LOGIC; RESISTANCE STATE; RESISTIVE SWITCHING; SOURCE TERMINAL; SPICE MACRO-MODEL; SRAM CELL;

EID: 74049128293     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2009.5280761     Document Type: Conference Paper
Times cited : (50)

References (15)
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    • Y. Shuto, S. Yamamoto, and S. Sugahara, Nonvolatile static random access memory based on spin-transistor architecture, J. Appl. Phys., 105, pp. 07C933-1-3, Apr. 2009.
    • Y. Shuto, S. Yamamoto, and S. Sugahara, "Nonvolatile static random access memory based on spin-transistor architecture," J. Appl. Phys., Vol. 105, pp. 07C933-1-3, Apr. 2009.
  • 5
    • 67849103654 scopus 로고    scopus 로고
    • S. Yamamoto and S. Sugahara, Nonvolatile Static Random Access Memory Using Magnetic Tunnel Junctions with Current-Induced Magnetization Switching Architecture, Jpn. J. Appl. Phys., 48, pp. 043001-1-7, Apr. 2009.
    • S. Yamamoto and S. Sugahara, "Nonvolatile Static Random Access Memory Using Magnetic Tunnel Junctions with Current-Induced Magnetization Switching Architecture," Jpn. J. Appl. Phys., Vol. 48, pp. 043001-1-7, Apr. 2009.
  • 6
    • 0038236059 scopus 로고    scopus 로고
    • Spin dependent tunneling devices fabricated for magnetic random access memory applications using latching mode
    • May
    • D. Wang, M. Tondra, A. V. Pohm, C. Nordman, J. Anderson, J. M. Daughton, and W. C. Black, "Spin dependent tunneling devices fabricated for magnetic random access memory applications using latching mode," J. Appl. Phys., vol. 87, no. 9, pp. 6385-6387, May 2000.
    • (2000) J. Appl. Phys , vol.87 , Issue.9 , pp. 6385-6387
    • Wang, D.1    Tondra, M.2    Pohm, A.V.3    Nordman, C.4    Anderson, J.5    Daughton, J.M.6    Black, W.C.7
  • 8
    • 0029359285 scopus 로고
    • 1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS
    • Aug
    • S. Mutoh, T. Douseki, Y. Matsuya, T. Aoki, S. Sigematsu, and J. Yamada, "1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS," IEEE J. Solid-State Circuits, vol. 30, no. 8, pp. 847-854, Aug. 1995.
    • (1995) IEEE J. Solid-State Circuits , vol.30 , Issue.8 , pp. 847-854
    • Mutoh, S.1    Douseki, T.2    Matsuya, Y.3    Aoki, T.4    Sigematsu, S.5    Yamada, J.6
  • 10
    • 74049141196 scopus 로고    scopus 로고
    • V. George, 45nm Next Generation Intel Core Microarchitecture (Penryn), Symp. Hgih Performance Chips, Aug. 2007, HC19.08.01.
    • V. George, "45nm Next Generation Intel Core Microarchitecture (Penryn)," Symp. Hgih Performance Chips, Aug. 2007, HC19.08.01.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.