A configurable asynchronous pseudorandom bit sequence generator

Proceedings - International Symposium on Asynchronous Circuits and Systems

Volumn , Issue , 2007, Pages 143-152

  Chow, Alex ^a   Coates, William S ^a   Hopkins, David ^a  

^a SUN MICROSYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FEEDBACK; TAPS;

ASYNCHRONOUS FIFO; FINER GRAINS; FIXED PERIOD; LINEAR FEEDBACK SHIFT REGISTERS; PSEUDO-RANDOM BIT SEQUENCE GENERATORS;

SHIFT REGISTERS;

EID: 74049105786     PISSN: 26431394     EISSN: 26431483     Source Type: Conference Proceeding    
DOI: 10.1109/async.2007.5     Document Type: Conference Paper

References (7)

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3. C. Molnar et a[. Two FIFO Ring Performance Experiments, Proc. 5" Intl. Symp. On Advanced Research in Asynchronous Circuits and Systems, Barcelona, Spain, 19-21 April 1999, pp. 161-172.
4. M. Goresky and A. M. Klapper, "Fibonacci and Galois Representations of Feedback-With-Cariy Shifl Registers IEEE Trans. on Information Theory, Vol. 48, No. 11, November 2002, Pp. 2826-2836.
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6. W. Coates and R. Drost, "Congestion and Starvation Detection for Ripple FIFOs" Proc. 9" Intl. Symp. on Advanced Research in Asynchronous Circuits and Systems, Vancouver, Canada, 12-16 May 2003, pp. 36-45.
7. E. Brunvand, "Low latency self-timed flao-throughow-through FIFOs Proc. 6th Conf. on Advanced Research in VLSI, Chapel Hill, 27-29 March 1995, Pp. 76-90.