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Volumn , Issue , 2009, Pages

An efficient SAR processor based on GPU via CUDA

Author keywords

CUDA; GPU; Sar processor

Indexed keywords

COMPUTE UNIFIED DEVICE ARCHITECTURES; GPU PROGRAMMING; GRAPHICS PROCESSING UNIT; GRAPHICS RENDERING; HIGH EFFICIENCY; HIGH-RESOLUTION SAR; PARALLEL PROCESSOR; PEAK SIDELOBE; SAR PROCESSORS; SIMULATED DATA; THEORETICAL VALUES; TIME OF PROCESSING; ULTRA-HIGH;

EID: 73849117664     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CISP.2009.5304418     Document Type: Conference Paper
Times cited : (16)

References (13)
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    • Cafforio, C.1    Prati, C.2    Rocca, F.3
  • 4
    • 0032115492 scopus 로고    scopus 로고
    • A new fourth order SAR processing algorithm for spaceborne SAR
    • Jul
    • K. Eldhuset, "A new fourth order SAR processing algorithm for spaceborne SAR", IEEE Transactions on Aerospace and Electronic Systems, vol. 34 no. 3, Jul. 1998, pp. 824-835.
    • (1998) IEEE Transactions on Aerospace and Electronic Systems , vol.34 , Issue.3 , pp. 824-835
    • Eldhuset, K.1
  • 6
    • 79551704836 scopus 로고    scopus 로고
    • NVIDIA CUDA Programming Guide Version 2.1
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    • Nvidia1
  • 7
    • 73849113394 scopus 로고    scopus 로고
    • Implementing a GPU-Efficient FFT. NVIDIA course presentation
    • J. Spitzer, "Implementing a GPU-Efficient FFT." NVIDIA course presentation, SIGGRAPH 2003.
    • SIGGRAPH 2003
    • Spitzer, J.1
  • 10
    • 43349092363 scopus 로고    scopus 로고
    • CUDA compatible GPU cards as efficient hardware accelerators for Smith-Waterman sequence alignment
    • S
    • Svetlin A. Manavski and Giorgio Valle, "CUDA compatible GPU cards as efficient hardware accelerators for Smith-Waterman sequence alignment", BMC Bioinformatics, 2008, 9(Suppl 2):S10, 2008.
    • (2008) BMC Bioinformatics , vol.9 , Issue.SUPPL. 2
    • Manavski, S.A.1    Valle, G.2
  • 11
    • 78651550268 scopus 로고    scopus 로고
    • J. Nickolls, I. Buck, M. Garland and K. Skadron, Scalable parallel programming with CUDA , Queue, ACM, 6 no. 2, 2008, pp. 40-53.
    • J. Nickolls, I. Buck, M. Garland and K. Skadron, "Scalable parallel programming with CUDA" , Queue, ACM, vol.6 no. 2, 2008, pp. 40-53.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.