SiO2

Handbook of 3D Integration: Technology and Applications of 3D Integrated Circuits

Volumn 1, Issue , 2008, Pages 107-120

  Wieland, Robert ^a  

^a Fraunhofer Institute Reliability and Microintegration   (Germany)

Author keywords

3D specific SiO2; Dielectric CVD; Electrical isolation; Ozone TEOS SACVD; TSVs

Indexed keywords

EID: 73249145960     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1002/9783527623051.ch6     Document Type: Chapter

References (15)

1. Schumicki, G. and Seegebrecht, P. (1991) Prozeßtechnologie - Fertigungsverfahren f€ur Integrierte MOS-Schaltungen, Springer Verlag, Berlin, 143 ff.
2. Widmann, D., Mader, H. and Friedrich, F. (1996) Technologie hochintegrierter Schaltungen, Springer Verlag, Berlin, 21 ff.
3. Wolf, S. and Tauber, R.N. (2000) Silicon Processing for the VLSI Era Volume 1:Process Technology, Lattice Press, Sunset Beach, California, 265 ff.
4. Nicollian, E.H. and Brews, J.R. (1982) MOS (Metal Oxide Semiconductor) Physics and Technology, Wiley, 709 ff.
5. Schumicki, G. and Seegebrecht, P. (1991) Prozeßtechnologie - Fertigungsverfahren f€ur Integrierte MOS-Schaltungen, Springer Verlag, Berlin, 189 ff.
6. Widmann, D., Mader, H. and Friedrich, F. (1996) Technologie hochintegrierter Schaltungen, Springer Verlag, Berlin, 13 ff.
7. Graßl, T. (1998) Oberfl€acheninduzierte Abscheidung von Siliziumdioxid aus der Gasphase, Technical University of Munich - Physical Department, E16, p. 30-32.
8. Graßl, T., Ramm, P. et al. (1995) Deposition of TEOS/O3 oxide layers for application in vertically integrated cicuit technology. Proceedings of the first International Dielectrics for VLSI/ULSI Mulitlevel Interconnection Conference, p. 382.
9. Wieland, R., Bonfert, D., Klumpp, A. et al. (2005) 3D Integration of CMO Stransistors with ICV-SLID technology, Proceedings European Workshop Materials for Advanced Metallization MAM 2005, Microelectronic Engineering 82, pp. 529-533.
10. Bunshah, R.F. (1994) Handbook of Deposition Technologies for Films and Coatings, Noyes Publications, Berkshire, UK, 374 ff.
11. Shareef, I.A. et al. (Jul/Aug 1995) Subatmospheric chemical vapor deposition ozone/TEOS process for SiO2 trench filling. Journal of Vacuum Science & Technology B, 13, p. 1891.
12. Chatterjee, A. et al. (1995) A shallow trench isolation study for 0.25/0.18 mm CMOS technologies and beyond. Symposium on VLSI Technology Digest of Technical Papers, 16.3, IEEE.
13. Chin, B.L. and van deVen, E.P. (April 1988) Plama TEOS process for interlayer dielectric applications. Solid State Technology, 119-122.
14. Wolf, S. and Tauber, R.N. (2000) Silicon Processing for the VLSI Era Volume 1: Process Technology, Lattice Press, Sunset Beach, California, 192 ff.
15. Fujino, K. et al. (1990) Silicon dioxide deposition by atmospheric pressure and low-temperature CVD using TEOS and ozone. Journal of the Electrochemical Society, 137 (9), 2883-2887.