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Volumn 56, Issue 1, 2010, Pages 27-37

An architecture of a high-speed digital hologram generator based on FPGA

Author keywords

CGH; Digital hologram; FPGA; Hardware; Real time

Indexed keywords

3D OBJECT; BIT-WIDTH; CGH; COMPUTER GENERATED HOLOGRAMS; DIGITAL HOLOGRAMS; FIXED-POINT SIMULATIONS; HARDWARE ARCHITECTURE; HIGH-SPEED; OPERATING FREQUENCY; OPERATION SPEED; PRECISION ANALYSIS;

EID: 73149116640     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sysarc.2009.11.001     Document Type: Article
Times cited : (19)

References (17)
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    • Computer generated holography using a graphics processing unit
    • Masuda N., Ito T., Tanaka T., Shiraki A., and Sugie T. Computer generated holography using a graphics processing unit. Opt. Express 14 2 (2006)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.