An embedded 65 nm CMOS baseband IQ 48 MHz-1 GHz dual tuner for DOCSIS 3.0

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 12, 2009, Pages 3511-3525

  Gatta, Francesco ^a   Gomez, Ray ^a   Shin, Young J ^a   Hayashi, Takayuki ^a   Zou, Hanli ^a   Chang, James Y C ^a   Leonard, Dauphinee ^a   Xiao, Jianhong ^a   Chang, Dave S H ^a   Chih, Tai Hong ^a   Brandolini, Massimo ^a   Koh, Dongsoo ^a   Hung, Bryan Juo Jung ^a   Wu, Tao ^a   Introini, Mattia ^a   Cusmai, Giuseppe ^a   Zencir, Ertan ^a   Singor, Frank ^a   Eberhart, Hans ^a   Tan, Loke K ^a   Currivan, Bruce ^a   He, Lin ^a   Cangiane, Peter ^a   Vorenkamp, Pieter ^a   more..

^a BROADCOM CORPORATION   (United States)

Author keywords

256 QAM; 64 QAM; ACI; ADC; Annex A; Annex B; Baseband IQ; Cable modem; CATV tuners; CMOS; CSO; CTB; DAC; DC offset loops; Direct digital frequency synthesizer (DDFS); DOCSIS 3.0; Down stream channels (DS); Downstream power management (DPM); Harmonic rejection RF front end (HR RFFE); Image rejection; Local oscillator (LO); Low IF; Noise figure (NF); SCTE40; Set top box; Signal to noise ratio (SNR); SOC; Variable gain amplifier (VGA); Variable gain low noise amplifier (VGLNA)

Indexed keywords

64 QAM; BASE BANDS; CABLE MODEMS; CSO; DC OFFSETS; DIRECT DIGITAL FREQUENCY SYNTHESIZER; DOWN-STREAM; HARMONIC REJECTION; IMAGE REJECTION; LOCAL OSCILLATORS; POWER MANAGEMENTS; RF FRONT END; SET TOP BOX; VARIABLE GAIN AMPLIFIERS;

ACOUSTIC SURFACE WAVE FILTERS; AUDIO FREQUENCY AMPLIFIERS; CABLES; CMOS INTEGRATED CIRCUITS; COCHANNEL INTERFERENCE; COMBINED SEWERS; DIELECTRIC RELAXATION; DIFFERENTIAL AMPLIFIERS; DIGITAL INTEGRATED CIRCUITS; ELECTRIC POWER MEASUREMENT; ENERGY MANAGEMENT; FREQUENCY SYNTHESIZERS; HARMONIC ANALYSIS; HYDRAULICS; MODEMS; MULTICARRIER MODULATION; NOISE FIGURE; PHASE LOCKED LOOPS; PHASE MEASUREMENT; PROGRAMMABLE LOGIC CONTROLLERS; QUADRATURE AMPLITUDE MODULATION; SIGNAL TO NOISE RATIO; TELECOMMUNICATION CABLES; VIDEO AMPLIFIERS;

TUNERS;

EID: 72949100578     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2032497     Document Type: Conference Paper

References (17)

1. Transmission Systems and Media, Digital Systems and Networks, Gigabit-Capable Passive Optical Networks (GPON): General Characteristics, ITU-T, G.984.1, Series G, 2008.
2. Transmission Systems and Media, Digital Systems and Networks, Very High Speed Digital Subscriber Line Transceivers 2 (VDSL2), ITU-T, G. 993.2, Series G, 2006.
3. Data Over Cable Service Interface Specifications, DOCSIS 3.0, Physical Layer Specification, CM-SP-PHYc3.0-I07-080522, Cable Labs, May 22, 2008.
4. Digital Cable Network Interface Standard, SCTE Engineering Committee, Digital Video Subcommittee, ANSI/SCTE 40, 2004.
5. J. R. Tourret et al., "SiP tuner with integrated LC tracking filter for both cable and terrestrial TV reception," IEEE J. Solid-State Circuits, vol.42, no.12, pp. 2809-2821, Dec. 2007.
6. J. M. Stevenson et al., "A multi-standard analog and digital TV tuner for cable and terrestrial applications," in IEEE ISSCC Dig. Tech. Papers, 2007, pp. 210-211.
7. M. Gupta et al., "A48-to-860MHzCMOSdirect conversionTV tuner," in IEEE ISSCC Dig. Tech. Papers, Feb. 2007, pp. 206-207.
8. D. Manstretta et al., "A highly linear broadband variable gain LNA for TV applications," in Proc. IEEE Custom Integrated Circuits Conf. (CICC), 2007, pp. 531-534.
9. J. Weldon et al., "A 1.75 GHz highly integrated narrowband CMOS transmitter with harmonic rejection mixers," IEEE J. Solid-State Circuits, vol.36, no.12, pp. 2003-2015, Dec. 2001.
10. A. Swaminathan et al., "A wide-bandwidth 2.4 GHz ISM-band fractional-PLL with adaptive phase-noise cancellation," IEEE J. Solid-State Circuits, vol.42, no.12, pp. 2639-2650, Dec. 2007.
11. C.-M. Hsu et al., "A low-noise wide-BW 3.6-GHz digital fractional-N frequency synthesizer with a noise-shaping time-to-digital converter and quantization noise cancellation," IEEE J. Solid-State Circuits, vol.43, no.12, pp. 2776-2786, Dec. 2008.
12. S. E. Meninger et al., "A 1 MHz bandwidth 3.6 GHz 0.18 μm CMOS fractional-N synthesizer utilizing a hybrid PFD/DAC structure for reduced broadband phase noise," IEEE J. Solid-State Circuits, vol.41, no.4, pp. 966-980, Apr. 2006.
13. E. Temporiti et al., "A 700 kHz bandwidth fractional synthesizer with spurs compensation and linearization techniques for WCDMA applications," IEEE J. Solid-State Circuits, vol.39, no.9, pp. 1446-1454, Sep. 2004.
14. I. Vassiliou et al., "A 65 nm CMOS multistandard, multiband TV tuner for mobile and multimedia applications," IEEE J. Solid-State Circuits, vol.43, no.7, pp. 1522-1533, Jul. 2008.
15. PacketCable™ 1.5 Specifications MIBs Framework Specification, PKT-SP-MIBS1.5-I02-070412, Cable Labs, Apr. 12, 2007.
16. J. van Sinderen et al., "A 48 MHz to 860 MHz digital cable tuner IC with integrated RF and IF selectivity," in IEEE ISSCC Dig. Tech. Papers, 2003, pp. 444-445.
17. ATSC Recommended Practices-Receiver Performance Guidelines, A74 Document, Advanced Television Systems Committee, Nov. 2007.