Energy optimization for latency- and quality- constrained video applications

IEEE Design and Test of Computers

Volumn 21, Issue 5, 2004, Pages 358-366

  Im, Chaeseok ^a   Ha, Soonhoi ^a  

^a Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CONSTRAINT THEORY; ENERGY UTILIZATION; IMAGE CODING; IMAGE QUALITY; OPTIMIZATION; QUALITY OF SERVICE; SYSTEMS ANALYSIS; VIDEO CAMERAS; VIDEO TELEPHONE EQUIPMENT;

DYNAMIC VOLTAGE SCALING; FRAME SKIPPING; LATENCY CONSTRAINT; MOBILE MULTIMEDIA; VIDEO QUALITY;

MULTIMEDIA SYSTEMS;

EID: 7244239144     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2004.58     Document Type: Article

References (4)

1. A.P. Chandrakasan, S. Sheng, and R.W. Brodersen, "Low-Power CMOS Digital Design," IEEE J. Solid-State Circuits, vol. 27, no. 4, Apr. 1992, pp. 473-484.
2. C. Im and S. Ha, "Dynamic Voltage Scheduling for Low-Power Multimedia Applications Using Buffers," Proc. Int'l Symp. Low Power Electronics and Design (ISLPED 01), IEEE Press, 2001, pp. 34-39.
3. C. Im and S. Ha, "Dynamic Voltage Scaling for Real-Time Multi-Task Scheduling Using Buffers," Proc. ACM Conf. Languages, Compilers, and Tools for Embedded Systems (LCTES 04), ACM Press, 2004, pp. 88-94.
4. T.D. Burd and R.W. Brodersen, "Design Issues for Dynamic Voltage Scaling," Proc. Int'l Symp. Low Power Electronics and Design (ISLPED 00), IEEE Press, 2000, pp. 9-14.