On-the-fly hardware acceleration for protocol stack processing in next generation mobile devices

Embedded Systems Week 2009 - 7th IEEE/ACM International Conference on Hardware/Software-Co-Design and System Synthesis, CODES+ISSS 2009

Volumn , Issue , 2009, Pages 155-162

  Szczesny, David ^a   Hessel, Sebastian ^a   Bruns, Felix ^a   Bilgic, Attila ^a  

^a RUHR UNIVERSITY BOCHUM   (Germany)

Author keywords

DMA; Embedded systems; Hardware acceleration; Hardware software co design; LTE; Real time; Virtual prototyping

Indexed keywords

ACCELERATION RATIO; AVERAGE EXECUTION TIME; COMPUTATIONAL DEMANDS; COMPUTATIONAL POWER; DATA RATES; DIRECT MEMORY ACCESS; HARDWARE ACCELERATION; HARDWARE ACCELERATORS; HARDWARE PLATFORM; HARDWARE SUPPORTS; HARDWARE/SOFTWARE CO-DESIGN; HARDWARE/SOFTWARE PARTITIONING; LAYER 2; LONG TERM EVOLUTION; ON-THE-FLY; PROTOCOL STACK; SINGLE-CORE PROCESSORS; SOFTWARE IMPLEMENTATION; TRANSMISSION CONDITIONS; VIRTUAL PROTOTYPING;

ACCELERATION; COMPUTER AIDED LOGIC DESIGN; COMPUTER SOFTWARE; CONTROLLERS; DESIGN; HARDWARE; MOBILE COMPUTING; MOBILE DEVICES; PORTABLE EQUIPMENT; REAL TIME SYSTEMS; SPACE DIVISION MULTIPLE ACCESS; WIRELESS NETWORKS;

EMBEDDED SYSTEMS;

EID: 72149087424     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1629435.1629457     Document Type: Conference Paper

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