A fault tolerant cache architecture for sub 500mV operation: Resizable Data Domposer Cache (RDC-Cache)

Embedded Systems Week 2009 - 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES'09

Volumn , Issue , 2009, Pages 251-259

  Sasan, Avesta ^a   Homayoun, Houman ^a   Eltawil, Ahmed ^a   Kurdahi, Fadi ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Fault Tolerance; Low Power Cache; Low power design; Low power memory organization; Memory organization; Remapping Cache; Variation Aware Cache; VFS

Indexed keywords

LOW POWER CACHE; LOW-POWER DESIGN; LOW-POWER MEMORY; REMAPPING; REMAPPING CACHE; VARIATION AWARE CACHE;

COMPUTATION THEORY; ELECTRIC POWER SUPPLIES TO APPARATUS; EMBEDDED SYSTEMS; FAULT TOLERANCE; FAULT TOLERANT COMPUTER SYSTEMS; PROGRAM COMPILERS; QUALITY ASSURANCE; RELOCATION;

CACHE MEMORY;

EID: 72049119906     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1629395.1629431     Document Type: Conference Paper

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