A compiler for high performance computing with many-core accelerators

Proceedings - IEEE International Conference on Cluster Computing, ICCC

Volumn , Issue , 2009, Pages

  Nakasato, Naohito ^a   Makino, Jun ^b  

^a UNIVERSITY OF AIZU   (Japan)

^b NATIONAL ASTRONOMICAL OBSERVATORY OF JAPAN   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EFFICIENT IMPLEMENTATION; HIGH PERFORMANCE COMPUTING; INPUT VARIABLES; LOOP-LEVEL PARALLELISM; MANY-CORE; MULTIDIMENSIONAL INTEGRAL; NESTED LOOPS; PARTICLE SIMULATIONS; PEAK PERFORMANCE; QUADRUPLE PRECISION; SIMD OPERATIONS; SINGLE PRECISION;

CLUSTER COMPUTING; COMPUTER GRAPHICS EQUIPMENT; COMPUTER SCIENCE; PARALLEL PROGRAMMING; STRUCTURED PROGRAMMING; TECHNICAL PRESENTATIONS;

PROGRAM COMPILERS;

EID: 72049116310     PISSN: 15525244     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CLUSTR.2009.5289127     Document Type: Conference Paper

References (13)

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