A novel buried-channel FinFET BE-SONOS NAND Flash with improved memory window and cycling endurance

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2009, Pages 224-225

  Lue, Hang Ting ^a   Hsiao, Yi Hsuan ^a   Du, Pei Ying ^a   Lai, Sheng Chih ^a   Hsu, Tzu Hsuan ^a   Hong, S P ^a   Wu, M T ^a   Hsu, F H ^a   Lien, N Z ^a   Lu, Chi Pin ^a   Hsieh, Jung Yu ^a   Yang, Ling Wu ^a   Yang, Tahone ^a   Chen, Kuang Chao ^a   Hsieh, Kuang Yeu ^a   Liu, Rich ^a   Lu, Chih Yuan ^a  

^a MACRONIX INTERNATIONAL CO LTD   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BIT LINES; BIT-LINE ANDS; BOOSTING METHOD; BURIED CHANNELS; CHANNEL DEVICE; CYCLING ENDURANCE; DEEP DEPLETION; FREE STRUCTURES; INTERFACE STATE; MEMORY WINDOW; N-CHANNEL; NAND FLASH; NAND FLASH MEMORY; NORMALLY ON; PROGRAM/ERASE; READ DISTURB; SHORT-CHANNEL EFFECT;

DURABILITY; FIELD EFFECT TRANSISTORS;

FLASH MEMORY;

EID: 71049165997     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

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2. H. T. Lue et al, in IEDM Tech. Dig., 2007, pp. 161-164.
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4. S. K. Sung, et al, in VLSI Symposia, pp. 86-87, 2006.
5. K.D. Suh, et, al, IEEE Journal of Solid-State Circuits, pp. 1149-1156, 1995.