A scalable and high performance software ISCSI implementation

FAST 2005 - 4th USENIX Conference on File and Storage Technologies

Volumn , Issue , 2005, Pages 267-280

  Joglekar, Abhijeet ^a   Kounavis, Michael E ^a   Berry, Frank L ^a  

^a INTEL RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GENERAL PURPOSE COMPUTERS; TRANSMISSION CONTROL PROTOCOL;

CYCLIC REDUNDANCY CODE; GENERAL PURPOSE PROCESSORS; IN-DEPTH UNDERSTANDING; LARGE AMOUNTS OF DATA; MEMORY REQUIREMENTS; PIPELINE PARALLELISMS; PROTOCOL IMPLEMENTATION; SECOND OPTIMIZATION;

CACHE MEMORY;

EID: 70749154643     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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