Simultaneous speculative threading: A novel pipeline architecture implemented in sun's ROCK processor

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2009, Pages 484-495

  Chaudhry, Shailender ^a   Cypher, Robert ^a   Ekman, Magnus ^a   Karlsson, Martin ^a   Landin, Anders ^a   Yip, Sherman ^a   Zeffer, Håkan ^a   Tremblay, Marc ^a  

^a SUN MICROSYSTEMS   (United States)

Author keywords

Checkpoint based architecture; Chip multiprocessor; CMP; Hardware speculation; Instruction level parallelism; Memory level parallelism; Processor architecture; SST

Indexed keywords

CHECK POINTING; CHIP MULTIPROCESSOR; INSTRUCTION LEVEL PARALLELISM; MEMORY DISAMBIGUATION; OUT OF ORDER; PIPELINE ARCHITECTURE; POWER EFFICIENT; PROCESSOR ARCHITECTURES; RE-ORDER BUFFERS; REGISTER RENAMING LOGIC; SEQUENTIAL PROGRAMS; SUN MICROSYSTEMS;

ATMOSPHERIC TEMPERATURE; COMPUTER HARDWARE; MICROPROCESSOR CHIPS; NANOTECHNOLOGY; PIPELINE PROCESSING SYSTEMS; SUBMARINE GEOPHYSICS; SYSTEMS ANALYSIS;

COMPUTER ARCHITECTURE;

EID: 70450257973     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1555754.1555814     Document Type: Conference Paper

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