Is asynchronous logic more robust than synchronous logic?

IEEE Transactions on Dependable and Secure Computing

Volumn 6, Issue 4, 2009, Pages 282-294

  Rahbaran, Babak ^a   Steininger, Andreas ^a  

^a VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

Author keywords

Asynchronous circuit; Delay fault.; FIDYCO; FPGA fault injection; Robustness

Indexed keywords

ASYNCHRONOUS SEQUENTIAL LOGIC; CLOCKS; ROBUSTNESS (CONTROL SYSTEMS); SOFTWARE TESTING;

ASYNCHRONOUS CIRCUITS; ASYNCHRONOUS DESIGN; ASYNCHRONOUS LOGIC; DELAY FAULTS; FAULT INJECTION; FIDYCO; SPECIFIC PROPERTIES; SYNCHRONOUS DESIGNS;

DELAY CIRCUITS;

EID: 70450237385     PISSN: 15455971     EISSN: None     Source Type: Journal    
DOI: 10.1109/TDSC.2008.37     Document Type: Article

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