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Volumn , Issue , 2009, Pages 1372-1375

A novel technique to minimize standby leakage power in nanoscale CMOS VLSI

Author keywords

Band to band tunneling (BTBT) leakage current; Leakage currents; Off state; Sleep mode; Standby mode; Sub threshold leakage current

Indexed keywords

BIAS VOLTAGE; CMOS INTEGRATED CIRCUITS; NANOTECHNOLOGY; SPICE; THRESHOLD VOLTAGE; VLSI CIRCUITS;

EID: 70450079169     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IMTC.2009.5168670     Document Type: Conference Paper
Times cited : (7)

References (9)
  • 1
    • 70450100060 scopus 로고    scopus 로고
    • ITRS, 2007 edition
    • ITRS, 2007 edition
  • 2
  • 3
    • 1542359166 scopus 로고    scopus 로고
    • Optimal Body Bias Selectin for Leakge Improvement and Process Compensation Over Different Technology Generations
    • August
    • Cassondra Neau, Kaushik Roy, "Optimal Body Bias Selectin for Leakge Improvement and Process Compensation Over Different Technology Generations", ISLEP'03, pp. 116-121, August 2003.
    • (2003) ISLEP'03 , pp. 116-121
    • Neau, C.1    Roy, K.2
  • 5
    • 33645698251 scopus 로고    scopus 로고
    • Delay and Power Monitoring Schemes for Minimizing Power Consumption by Means of Supply and Threshold Voltage Control in Active and Standby Modes
    • Apr
    • Masahiro Nomura, Yoshifumi Ikenaga, et al., "Delay and Power Monitoring Schemes for Minimizing Power Consumption by Means of Supply and Threshold Voltage Control in Active and Standby Modes", IEEE J. Solid-State Circuits, Vol. 41, No. 4, Apr.2006.
    • (2006) IEEE J. Solid-State Circuits , vol.41 , Issue.4
    • Nomura, M.1    Ikenaga, Y.2
  • 6
    • 33646864552 scopus 로고    scopus 로고
    • Leakage Current Mechanisms and Leakage Reduction Techniques in Deep-Submicrometer CMOS Circutis
    • Feb
    • Kaushik Roy, et al., "Leakage Current Mechanisms and Leakage Reduction Techniques in Deep-Submicrometer CMOS Circutis", Proceeding of the IEEE, Vol. 91, No. 2, Feb.2003.
    • (2003) Proceeding of the IEEE , vol.91 , Issue.2
    • Roy, K.1
  • 7
    • 70449848186 scopus 로고    scopus 로고
    • Kyung Ki Kim, Yong-Bin Kim, A Novel Adaptive Design Methodology for Minimum Leakage Power Considering PVT Variations on Nanoscale VLSI Systems IEEE Transactions on Very Large Scale Integrated Systems 2008
    • Kyung Ki Kim, Yong-Bin Kim, "A Novel Adaptive Design Methodology for Minimum Leakage Power Considering PVT Variations on Nanoscale VLSI Systems" IEEE Transactions on Very Large Scale Integrated Systems 2008
  • 8
    • 65349085835 scopus 로고    scopus 로고
    • Leakage Minimization Technique For Nanoscale CMOS VLSI Based on Macro-Cell Modeling
    • July-August
    • Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Park, "Leakage Minimization Technique For Nanoscale CMOS VLSI Based on Macro-Cell Modeling", IEEE Design and Test of Computers, pp 322-330, July-August, 2007.
    • (2007) IEEE Design and Test of Computers , pp. 322-330
    • Kim, K.K.1    Kim, Y.-B.2    Choi, M.3    Park, N.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.