An end-to-end approach for the automatic derivation of application-aware error detectors

Proceedings of the International Conference on Dependable Systems and Networks

Volumn , Issue , 2009, Pages 584-589

  Lyle, Galen ^a   Chen, Shelley ^b   Pattabiraman, Karthik ^a   Kalbarczyk, Zbigniew ^a   Iyer, Ravishankar ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b SCIENCE APPLICATIONS INTERNATIONAL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AREA OVERHEAD; AUTOMATIC DERIVATION; CRITICAL VARIABLES; DETECTION MECHANISM; ERROR DETECTORS; EXECUTION TIME; HARDWARE/SOFTWARE; PERFORMANCE PENALTIES; RECOMPUTATION; RUNTIMES;

DETECTORS;

ERROR DETECTION;

EID: 70449955525     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2009.5270291     Document Type: Conference Paper

References (17)

1. R. Baumann. The impact of technology scaling on soft error rate performance and limits to the efficacy of error correction. Electron Devices Meeting (IEDM), 2002.
2. A. Benso, S. Chiusano, P. Prinetto, and L. Tagliaferri. A C/C++ source-to-source compiler for dependable applications. In Proc. of the Int't Conference on Dependable Systems and Networks (DSN), 2000.
3. M. Budiu, G. Venkataramani, T. Chelcea, and S. C. Goldstein. Translating ansi c to asynchronous circuits. In 10th Int't Symp. on Asynchronous Circuits and Systems (ASYNC '04), 2004.
4. I. Corp. Intel core duo processor and intel core solo processor on 65 nm processor: Specification update, revision 017, 2008. http://download.intel.com/ design/mobile/SPECUPDT/30922214.pdf.
5. J. Gaisler. Leon 3 synthesizable processor. Online. http://www.gaisler. com.
6. J. Gray. Why do computers stop and what can be done about it? In Proc. of Symp. on Reliability in Distributed Software and Database Systems, 1986.
7. J. Hennesey and P. Nye. Stanford integer and floating point benchmarks, 1988.
8. R. K. Iyer, N.M. Nakka, Z. T. Kalbarcyzk, and S. Mitra. Recent advances and new avenues in hardware-level reliability support. IEEE MICRO, 25(6), 2005.
9. I. Lee and R. K. Iyer. Software dependability in the tandem GUARDIAN system. IEEE Trans. Softw. Eng., 21(5), 1995.
10. N. Nakka, Z. Kalbarczyk, R. K. Iyer, and J. Xu. An architectural framework for providing reliability and security support. In Proc. of the Int't Conference on Dependable Systems and Networks (DSN'04), 2004.
11. N. Oh, P. P. Shirvani, and E. J. McCluskey. Error detection by duplicated instructions in super-scalar processors. In IEEE Transactions on Reliability, 2002.
12. K. Pattabiraman, Z. Kalbarczyk, and R. Iyer. Application-based metrics for strategic placement of detectors. In Proc. of 11th Int't Symp. on Pacific Rim Dependable Computing (PRDC), 2005.
13. K. Pattabiraman, Z. Kalbarczyk, and R. K. Iyer. Automated derivation of application-aware error detectors using static analysis, 2007.
14. G. A. Reis, J. Chang, N. Vachharajani, R. Rangan, and D. I. August. SWIFT: Software implemented fault tolerance. In Proc. of the 3rd Int'l Symp. on Code Generation and Optimization, 2005.
15. T. J. Siegel, E. Pfeffer, and J. A. Magee. The IBM eServer z990 microprocessor. IBM J. Res. Dev., 48(3-4), 2004.
16. M.Weiser. Program slicing. In Proc. of the 5th international Conference on Software engineering (ICSE'81), 1981.
17. X. Zhu and B. Lin. Hardware compilation for fpga-based configurable computing machines. In DAC '99: Proc. of the 36th Conference on Design automation, 1999.