A flexible design flow for software IP binding in commodity FPGA

Proceedings - 2009 IEEE International Symposium on Industrial Embedded Systems, SIES 2009

Volumn , Issue , 2009, Pages 211-218

  Gora, Michael A ^a   Maiti, Abhranil ^a   Schaumont, Patrick ^a  

^a Virginia Polytechnic Institute and State University   (United States)

Author keywords

FPGA; Intellectual property; Physical uncionable functions; Security applications; Software binding

Indexed keywords

CRITICAL COMPONENT; DESIGN FLOWS; FLEXIBLE DESIGNS; FPGA; HARDWARE AND SOFTWARE; NOVEL DESIGN; PHYSICAL UNCIONABLE FUNCTIONS; PHYSICAL UNCLONABLE FUNCTIONS; PROTOTYPE IMPLEMENTATIONS; SECURITY APPLICATIONS; SOFTWARE BINDING; SOFTWARE INTELLECTUAL PROPERTIES; SYSTEM ON CHIPS;

COMPUTER SOFTWARE; CRYPTOGRAPHY; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTELLECTUAL PROPERTY; NETWORK SECURITY;

SOFTWARE PROTOTYPING;

EID: 70449451246     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SIES.2009.5196217     Document Type: Conference Paper

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