A 58-μW single-chip sensor node processor using synchronous MAC protocol

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2009, Pages 290-291

  Takeuchi, Takashi ^a   Izumi, Shintaro ^a   Matsuda, Takashi ^a   Lee, Hyeokjong ^a   Otake, Yu ^a   Konishi, Toshihiro ^a   Tsuruda, Koh ^a   Sakai, Yasuharu ^a   Fujiwara, Hidehiro ^a   Ohta, Chikara ^a   Kawaguchi, Hiroshi ^a   Yoshimoto, Masahiko ^a  

^a KOBE UNIVERSITY   (Japan)

Author keywords

Low power; Single chip sensor node; Synchronous MAC; Wireless sensor network

Indexed keywords

CMOS PROCESSS; LOW POWER; MAC PROCESSORS; MAC PROTOCOL; MEDIA ACCESS CONTROL; MICRO-PROCESSORS; NETWORK ENVIRONMENTS; SINGLE-CHIP; SINGLE-CHIP SENSOR NODE; SINGLE-CHIP SENSORS; SYNCHRONOUS MAC; TEST CHIPS; ULTRA-LOW-POWER SENSORS;

ACCESS CONTROL; SENSOR NETWORKS; SENSOR NODES; TELECOMMUNICATION EQUIPMENT; VLSI CIRCUITS; WIRELESS TELECOMMUNICATION SYSTEMS;

WIRELESS SENSOR NETWORKS;

EID: 70449413842     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. B.P. Otis, et al., "An Ultra-Low Power MEMS-Based Two-Channel Transceiver for Wireless Sensor Networks,"Symp. VLSI Circuits Dig. Tech. Papers, pp. 20-23, June. 2004.
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3. En-Yi A.Lin, et al., "Power-Efficient Rendez-vous Schemes for Dense Wireless Sensor Networks,"ICC, vol.7, pp. 3769-3776, June. 2004.
4. M. Ichien, et al., "Isochronous MAC using long-wave standard time code for wireless sensor networks,"Proc. International Conference on Communications and Electronics, pp.172-177, Oct. 2006.
5. M. Maroti, et al., "The Flooding Time Synchronization Protocol," Proceedings of the 2nd ACM Conference on Embedded Networked Sensor Systems, Baltimore, Maryland 2004.
6. "http://www.qualnet.com/," Scalable Network Technologies.