A 32×32 self-timed multiplier with early completion

AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs

Volumn , Issue , 1999, Pages 319-321

  Kim, Do Wan ^a   Jeong, Deog Kyoon ^a  

^a Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 70449125246     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APASIC.1999.824093     Document Type: Conference Paper

References (5)

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2. S. B. Furber and P. Day, "Four-phase micropipeline latch conrtol circuits, " IEEE Trans. VLSI system, vol. 4, pp. 247-253, June 1996.
3. S. B. Furber, J. D. Garside, P. Riocreux, S. Temple, P. Day, J. Liu, N. C. Paver, "AMULET2e: An asynchronous embedded controller", Proceeding of IEEE, vol. 87, no. 2, pp. 243-256, Feb. 1999.
4. David Kearney and Neil W. Bergmann, "Bundled Data Asynchronous Multipliers with Data Dependent Computation Times, " Third International Symposium on Advanced Research in Asynchronous Circuit and Systems, pp. 186-197, April. 7-10, 1997.
5. T. Callaway and E. Swartzlander Jr., "Power-Delay Characteristics of CMOS Multiplier, " 13th IEEE Symposium on Computer Arithmetic, pp. 26-32, 1997.