A multi-level parallel simulation approach to electron transport in nano-scale transistors

2008 SC - International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2008

Volumn , Issue , 2008, Pages

  Luisier, Mathieu ^a   Klimeck, Gerhard ^a  

^a Purdue University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIAS POINTS; COMPLEX EQUATIONS; CURRENT CHARACTERISTIC; ELECTRON TRANSPORT; MULTI-LEVEL; NANO-DEVICES; NANOELECTRONIC DEVICES; NANOSCALE TRANSISTORS; OUTPUT CHARACTERISTICS; PARALLEL EFFICIENCY; PARALLEL SIMULATIONS; PHYSICS-BASED SIMULATION; QUANTUM MECHANICAL; SINGLE CPU; SINGLE INPUT; SMALL CLUSTERS;

COMPUTER SCIENCE; ELECTRON TRANSITIONS; ELECTRON TRANSPORT PROPERTIES; INTEGRATED CIRCUIT LAYOUT; NANOSTRUCTURED MATERIALS; PROFITABILITY; QUANTUM CHEMISTRY; QUANTUM THEORY; SUPERCOMPUTERS;

FIELD EFFECT TRANSISTORS;

EID: 70350747437     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SC.2008.5215912     Document Type: Conference Paper

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