Asynchronous on-line monitoring of logical and temporal assertions

Lecture Notes in Electrical Engineering

Volumn 10 LNEE, Issue , 2008, Pages 243-253

  Morin Allory, K ^a   Fesquet, L ^a   Roustan, B ^b   Borrione, D ^a  

^a TIMA LABORATORY   (France)

^b Grenoble INP Phelma   (France)

Author keywords

Asynchronous circuits; Hardware monitors; PSL; SVA

Indexed keywords

ASYNCHRONOUS CIRCUITS; ASYNCHRONOUS MONITORS; CHECKER SYNTHESIS; HARDWARE MONITORS; LOGICAL ASSERTIONS;

COMPUTER MONITORS; LOGIC CIRCUITS;

FORMAL LANGUAGES;

EID: 70350411042     PISSN: 18761100     EISSN: 18761119     Source Type: Book Series    
DOI: 10.1007/978-1-4020-8297-9_17     Document Type: Conference Paper

References (18)