Low-loss 0.13-μm CMOS 50 - 70 GHz SPDT and SP4T switches

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2009, Pages 43-46

  Atesal, Yusuf A ^a   Cetinoneri, Berke ^a   Rebeiz, Gabriel M ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

0.13 m CMOS; SP4T switch; SPDT switch; Substrate resistance

Indexed keywords

CHIP AREAS; CMOS PROCESSS; CMOS TECHNOLOGY; DEEP TRENCH; LOW INSERTION LOSS; LOW LOSS; OUTPUT MATCHING NETWORK; OUTPUT PORTS; RETURN LOSS; SINGLE POLE FOUR THROWS; SP4T SWITCH; SPDT SWITCH; SUBSTRATE RESISTANCE;

BANDPASS FILTERS; CMOS INTEGRATED CIRCUITS; DIGITAL INTEGRATED CIRCUITS; INTEGRATED CIRCUITS; POLES; RADIO; RADIO WAVES; SEMICONDUCTOR SWITCHES; SUBSTRATES;

SWITCHES;

EID: 70350241489     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2009.5135486     Document Type: Conference Paper

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