A scalable MIMO detection architecture with non-sorted multiple-candidate selection

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2009, Pages 689-692

  Chiu, Po Lin ^a   Huang, Yuan Hao ^b  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CANDIDATE SELECTION; DETECTION PROBABILITIES; ERROR PROPAGATION; HIGH FLEXIBILITY; HIGH PERFORMANCE SYSTEMS; ITS ARCHITECTURE; MIMO DETECTION; ML DETECTIONS; V-BLAST; VLSI ARCHITECTURES;

COMPUTATIONAL COMPLEXITY; DATA COMMUNICATION EQUIPMENT; DATA COMMUNICATION SYSTEMS; ERROR DETECTION; MULTIPLEXING; WAVE INTERFERENCE;

ALGORITHMS;

EID: 70350175896     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2009.5117842     Document Type: Conference Paper

References (9)

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