A compact current mode neuron circuit with gaussian taper learning capability

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2009, Pages 2129-2132

  Li, Fei ^a   Chang, Chip Hong ^a   Siek, Liter ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CURRENT; CURRENT MODE; EUCLIDEAN; GAUSSIAN FUNCTIONS; GAUSSIANS; INPUT DATAS; LEARNING CAPABILITIES; LEARNING CONTROL; LEARNING RATES; M-TECHNOLOGIES; NEURON CIRCUITS; POWER CONSUMPTION; TOPOLOGICAL DISTANCE;

CELL MEMBRANES; CONFORMAL MAPPING; ELECTRIC POWER SUPPLIES TO APPARATUS; FREQUENCY MULTIPLYING CIRCUITS; LEARNING ALGORITHMS;

EDUCATION;

EID: 70350165404     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2009.5118216     Document Type: Conference Paper

References (11)

1. T. Kohonen, Self-Organizing Maps. Berlin, Germany: Springer-Verlag, 2001.
2. K. Basterretxea, J. M. Tarela, and I. del Campo, "Digital gaussian membership function circuit for neuro-fuzzy hardware," Electronic Letters, vol. 42, no. 1, Jan. 2006, pp. 44-46.
3. U. Meyer-Base, A. Meryer-Base, J. Ramirez, and A. Garcia, "A high radix cordic architecture dedicated to compute the gaussian potential function in neural networks," in Proc. SPIE - The Int. Society for Optical Engineering, vol.5103, Orlando, USA, Apr. 2003, pp. 189-200.
4. R. Kolinummi, T. Hamalainen, and K, Kaski, "Mappings of SOM and LVQ on the tree shap neurocomputer," in Proc. Int. Conf. on Neural Networks, vol. 2, Houston, USA, Jun. 1997, pp. 904-909.
5. B. Pino, F.J. Pelayo, J.Ortega and A. Prieto, "Design and evaluation of a reconfigurable digital architecture for self-organizing maps," in Proc. 7th Int. Conf. on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, Granada, Spain, Apr. 1999, pp. 395-402.
6. D. S. Masmoudi, A. T. Dieng, and M. Masmoudi, "A subthreshold mode programmable implementation of the Gaussian function for RBF neural networks applications," in Proc. Int. Conf. on Intelligent Control, Vancouver, Canada, Oct. 2002, pp. 454-459.
7. T. Talaska, R. Dlugosz, and R. Wojtyna, "Current mode Euclidean distance calculation circuit for kohonen's neural network implementated in CMOS 0.18um technology," in Proc. 14th Int. Conf. on Mixed Design of Integrated Circuits and Syst., 2007, pp. 250-255.
8. S. S. Watkins, and P. M. Chau, "A radial basis function neurocomputer implemented with analog vlsi circuits," in Proc. Int. Joint Conf. on Neural Networks, Baltimore, USA, Jun. 1992, vol. 2, pp. 607-612.
9. T. Arthansiri, V. Kasemsuwan, and H. K. Ahn, "A +/- 1.5V high frequency four quadrant current multiplier," in Proc.2005 Int. Symp. On Circuits and Syst., Kobe, Japan, May 2005, vol. 2, pp. 23-26.
10. T. Talaska, R. Dlugosz, R. Wojtyna, "Current mode analog kohonen neural network," in Proc. Int. Conf. Mixed Design of Circuits and Syst., Ciechocinek, Poland, Jun.2006, pp. 310-315.
11. B. H. Calhoun, A. Wang, and I. Chandrakasan, "Modeling and sizing for minimum energy operation in subthreshold circuits" IEEE J. Solid-State Circuits, vol. 40, no. 9, Sep. 2005, pp. 1778-1786.