Optimized Ni oxidation in 80-nm contact holes for integration of forming-free and low-power Ni/NiO/Ni memory cells

IEEE Transactions on Electron Devices

Volumn 56, Issue 10, 2009, Pages 2363-2368

  Goux, Ludovic ^a   Lisoni, Judit G ^a   Wang, Xin Peng ^a   Jurczak, Malgorzata ^a   Wouters, Dirk J ^a  

^a IMEC   (Belgium)

Author keywords

Integration; NiO memory; Reset current; Scaling

Indexed keywords

CELL ARRAY; COMPLEMENTARY METAL OXIDE SEMICONDUCTORS; CONTACT HOLES; HIGH-POWER; LOW POWER; LOW RESET CURRENTS; MEMORY CELL; NIO MEMORY; RESET CURRENT; RESET CURRENTS; SCALING; SWITCHING VOLTAGES;

CELL MEMBRANES; ELECTRODES; OXYGEN; PHOTOLITHOGRAPHY; TITANIUM NITRIDE;

FILAMENTS (LAMP);

EID: 70350057158     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2028378     Document Type: Article

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