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Volumn 4981 LNCS, Issue , 2008, Pages 542-555

Parameter synthesis for piecewise affine systems from temporal logic specifications

Author keywords

Formal Verification; Piecewise Affine Systems

Indexed keywords

COMPUTER CIRCUITS; FORMAL VERIFICATION; HYBRID SYSTEMS;

EID: 70350031847     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-78929-1_39     Document Type: Conference Paper
Times cited : (18)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.