Advanced bilayer low-k dielectric cap for reliable high performance Cu-low k interconnects

Advanced Metallization Conference (AMC)

Volumn , Issue , 2009, Pages 673-679

  Bonilla, Griselda ^a   Clevenger, Lawrence A ^b   Hu, Chao Kun ^a   Nguyen, Son ^c   Cheng, Tien J ^b   Sun, Zhiguo ^d   Shobha, Hosadurga ^c   Cohen, Stephan ^a   Fischer, Armin ^e   Chanda, Kaushik ^b   Wu, Ping Liu ^d   Xu, Yiheng ^b   Shaw, Thomas M ^a   Chace, Mark S ^b   Liniger, Eric G ^a   Molis, Steven E ^b   Wang, Yun Y ^b   Gill, Jason ^b   Quon, Roger A ^b   Biery, Glenn ^b  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM RESEARCH   (United States)

^c IBM   (United States)

^d Chartered Semiconductor Manufacturing   (United States)

^e INFINEON TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADVANCED CMOS DEVICE; BARRIER PROPERTIES; BI-LAYER; BI-LAYER FILMS; BOTTOM LAYERS; CMOS DEVICES; DIELECTRIC CONSTANTS; HIGH NITROGEN CONTENT; INTERFACIAL CHARACTERISTICS; LOW K DIELECTRICS; LOW-K INTERCONNECTS; NITROGEN CONTENT;

DIELECTRIC MATERIALS; MECHANICAL PROPERTIES; METALLIZING; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION;

COPPER;

EID: 70349895408     PISSN: 15401766     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. Sankaran et al., IEDM 2006.
2. ITRS Roadmap, 2007.
3. I. M. Elfadel, M. B. Anand et al., "Aquaia: A CAD tool for on-chip interconnect modeling, analysis and optimization", Dig. Electr. Perf. Electronic Packaging, Vol. 11, Monterey, CA, Oct. 2002, pp. 337-340.
4. A. Lakshmanan, A Lee, J. Lee and B. H. Kim, US Patent # 7288205 (2007).