Electronic system-level synthesis methodologies

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 28, Issue 10, 2009, Pages 1517-1530

  Gerstlauer, Andreas ^a   Haubelt, Christian ^b   Pimentel, Andy D ^c   Stefanov, Todor P ^d   Gajski, Daniel D ^e   Teich, Jrgen ^b  

^a The University of Texas at Austin   (United States)

^b UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

^c UNIVERSITY OF AMSTERDAM   (Netherlands)

^d LEIDEN UNIVERSITY   (Netherlands)

^e UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Electronic system level (ESL); Methodology; Synthesis.

Indexed keywords

COMPLETE SYSTEM; DESIGN PROCESS; ELECTRONIC SYSTEM DESIGN; ELECTRONIC SYSTEM LEVEL; ELECTRONIC SYSTEM LEVEL (ESL); HARDWARE AND SOFTWARE; LEVELS OF ABSTRACTION; METHODOLOGY; SEMICONDUCTOR ROADMAPS; SYNTHESIS METHODOLOGY; SYNTHESIS SOLUTION; SYNTHESIS TOOL; SYNTHESIS.; SYSTEM COMPLEXITY;

ELECTRONICS ENGINEERING; HUMAN COMPUTER INTERACTION; SYSTEM THEORY; SYSTEMS ANALYSIS;

PHOTOLITHOGRAPHY;

EID: 70349754160     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2009.2026356     Document Type: Article

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