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Volumn , Issue , 2008, Pages 1872-1875
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Iris template generation with parallel logic
a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
C++ CODES;
DIRECTIONAL FILTERING;
INFORMATION CONTENTS;
IRIS RECOGNITION;
IRIS RECOGNITION ALGORITHM;
IRIS TEMPLATE;
PARALLEL LOGIC;
PARALLEL PROCESSING;
PARALLELIZED ALGORITHM;
PERFORMANCE COMPARISON;
SEQUENTIAL PROCESSING;
SPEED-UPS;
TEMPLATE GENERATION;
BIOMETRICS;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
PERSONAL COMPUTERS;
PARALLEL ALGORITHMS;
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EID: 70349655507
PISSN: 10586393
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ACSSC.2008.5074753 Document Type: Conference Paper |
Times cited : (4)
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References (8)
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