High-level symbolic simulation for automatic model extraction

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009

Volumn , Issue , 2009, Pages 218-221

  Ouchet, Florent ^a   Borrione, Dominique ^a   Morin Allory, Katell ^a   Pierre, Laurence ^a  

^a TIMA LABORATORY   (France)

Author keywords

Circuit simulation; Hardware design language; Simulation software

Indexed keywords

AUTOMATIC MODELS; COMPLEX DATA; FORMAL MODEL; FORMAL REASONING; HARDWARE DESIGN LANGUAGE; SIMULATION SOFTWARE; SYMBOLIC SIMULATION; THEOSIM; VHDL DESCRIPTION;

CIRCUIT SIMULATION; COMPUTER SIMULATION LANGUAGES; DESIGN; ELECTRON TUBES; HARDWARE; LINGUISTICS; SIMULATORS;

COMPUTER SOFTWARE;

EID: 70349335717     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DDECS.2009.5012132     Document Type: Conference Paper

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