A software-defined radio receiver architecture robust to out-of-band interference

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2009, Pages 230-232

  Ru, Z ^a   Klumperink, E A M ^a   Wienk, G J M ^a   Nauta, B ^a  

^a UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 70349294331     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2009.4977392     Document Type: Conference Paper

References (7)

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2. J. Craninckx, M. Liu, D. Hauspie et al, "A Fully Reconfigurable Software-Defined Radio Transceiver in 0.13μm CMOS", ISSCC Dig. Tech. Papers, pp. 346-347, Feb. 2007.
3. J. Weldon, J. Rudell, L. Lin et al, "A 1.75GHz Highly Integrated Narrowband CMOS Transmitter with Harmonic-Rejection Mixers", ISSCC Dig. Tech. Papers, pp. 160-161, Feb. 2001.
4. Z. Ru, E. Klumperink and B. Nauta, "A Discrete-Time Mixing Receiver Architecture with Wideband Harmonic Rejection", ISSCC Dig. Tech. Papers, pp. 322-323, Feb. 2008.
5. S. Rabii and B. Wooley, "A 1.8V Digital-Audio Δ∑ Modulator in 0.8μm CMOS", IEEE J. Solid-State Circuits, vol.32, no.6, pp. 783-796, June 1997.
6. M. Valla, G. Montagna, R. Castello et al, "A 72mW CMOS 802.11a Direct-Conversion Front-End with 3.5dB NF and 200kHz 1/f Noise Corner", IEEE J. Solid-State Circuits, vol.40, no.4, pp. 970-977, April 2005.
7. H. Darabi, "A Blocker Filtering Technique for Wireless Receivers", ISSCC Dig. Tech. Papers, pp. 84-85, Feb. 2007.