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Volumn 1, Issue , 2008, Pages 129-133

LTR: A low-overhead and reliable routing for network on chips

Author keywords

[No Author keywords available]

Indexed keywords

NETWORK ARCHITECTURE;

EID: 69949106800     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOCDC.2008.4815590     Document Type: Conference Paper
Times cited : (6)

References (21)
  • 2
    • 0036149420 scopus 로고    scopus 로고
    • Networks on chips: A new SoC paradigm
    • DOI 10.1109/2.976921
    • L. Benini, G. De Micheli, "Networks on Chips: A New SoC Paradigm", IEEE Computers, Vol.35(1), pp. 70-78, Jan. 2002. (Pubitemid 34069383)
    • (2002) Computer , vol.35 , Issue.1 , pp. 70-78
    • Benini, L.1    De Micheli, G.2
  • 6
    • 1142287741 scopus 로고    scopus 로고
    • A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip
    • H. Zimmer, A. Jantsch,"A Fault Model Notation and Error-Control Scheme for switch-to-Switch Buses in a Network-on-Chip", Proc. ISSS/CODES, pp. 188- 193, Sept 2003.
    • (2003) Proc. ISSS/CODES , pp. 188-193
    • Zimmer, H.1    Jantsch, A.2
  • 8
    • 0034848112 scopus 로고    scopus 로고
    • Route packets, not wires: on-chip interconnection networks
    • W. J. Dally, B. Towles, "Route packets, not wires: on-chip interconnection networks", In Proc. Design Automatin Conf. (DAC), pp 684-689, June 2001.
    • (2001) Proc. Design Automatin Conf. (DAC) , pp. 684-689
    • Dally, W.J.1    Towles, B.2
  • 12
    • 27944452666 scopus 로고    scopus 로고
    • Fault and energy-aware communication mapping with guaranteed latency for applications implemented on NoC
    • San Diego, California, USA
    • S. Manolache, P. Eles, Z. Peng, "Fault and energy-aware communication mapping with guaranteed latency for applications implemented on NoC", Proc. of the 42nd annual Conf. on Design Automation (DAC 2005), San Diego, California, USA.
    • (2005) Proc. of the 42nd annual Conf. on Design Automation (DAC)
    • Manolache, S.1    Eles, P.2    Peng, Z.3
  • 15
    • 34247277804 scopus 로고    scopus 로고
    • A multipath routing strategy with guaranteed in-order packet delivery and faulttolerance for networks on chip
    • San Francisco, Calif, USA, July
    • S. Murali, D. Atienza, L. Benini, and G. De Micheli, "A multipath routing strategy with guaranteed in-order packet delivery and faulttolerance for networks on chip," in Proc. of the 43rd ACM/IEEE Design Automation Conf. (DAC '06), pp. 845-848, San Francisco, Calif, USA, July 2006.
    • (2006) Proc. of the 43rd ACM/IEEE Design Automation Conf. (DAC '06) , pp. 845-848
    • Murali, S.1    Atienza, D.2    Benini, L.3    De Micheli, G.4
  • 17
    • 69949090868 scopus 로고    scopus 로고
    • Testing SoC interconnects for signal integrity using boundary scan
    • M. H. Tehranipour, N. Ahmed, M. Nourani, "Testing SoC Interconnects for Signal Integrity Using Boundary Scan", VTS 2003: 158-172
    • (2003) VTS , pp. 158-172
    • Tehranipour, M.H.1    Ahmed, N.2    Nourani, M.3
  • 21
    • 0027837827 scopus 로고
    • A new theory of deadlock-free adaptive routing in wormhole networks
    • J. Duato, "A new theory of deadlock-free adaptive routing in wormhole networks," Parallel and Distributed Systems, IEEE Transactions on, vol. 4, pp. 1320-1331, 1993
    • (1993) Parallel and Distributed Systems, IEEE Transactions on , vol.4 , pp. 1320-1331
    • Duato, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.