Efficient parallel processing with spin-wave nanoarchitectures

Journal of Supercomputing

Volumn 49, Issue 2, 2009, Pages 248-267

  Eshaghian Wilner, Mary M ^a   Navab, Shiva ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Nanoscale spin wave architectures; Parallel algorithms; Parallel architectures; Routing

Indexed keywords

ALGORITHM DESIGN; APPLICATION EXAMPLES; DIFFERENT FREQUENCY; FAST ALGORITHMS; FAULT TOLERANT ROUTING; NANOARCHITECTURES; NANOSCALE SPIN-WAVE ARCHITECTURES; PARALLEL PROCESSINGS; PARALLEL TECHNIQUES; READ/WRITE OPERATIONS; ROUTING;

ARCHITECTURAL DESIGN; NANOSTRUCTURED MATERIALS; PARALLEL ARCHITECTURES; ROUTING ALGORITHMS; SET THEORY; SPIN DYNAMICS; SPIN WAVES;

PARALLEL ALGORITHMS;

EID: 69049102236     PISSN: 09208542     EISSN: 15730484     Source Type: Journal    
DOI: 10.1007/s11227-008-0237-6     Document Type: Article

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