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Volumn 1965, Issue , 2000, Pages 293-301

Montgomery exponentiation with no final subtractions: Improved results

Author keywords

Modular exponentiation; Montgomery multiplication; Power attacks; Smart cards; Timing attacks

Indexed keywords

CRYPTOGRAPHY; EMBEDDED SYSTEMS; HARDWARE; SIDE CHANNEL ATTACK; SMART CARDS;

EID: 68549090587     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: None     Document Type: Conference Paper
Times cited : (83)

References (18)
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  • 3
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  • 7
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    • Stephen, E.1
  • 8
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    • Hardware Implementation of Montgomery’s Modular Multiplication Algorithm
    • Stephen E. Eldridge and Colin D. Walter. Hardware Implementation of Montgomery’s Modular Multiplication Algorithm. IEEE Transactions on Computers, 42(6):693-699, June 1993.
    • (1993) IEEE Transactions on Computers , vol.42 , Issue.6 , pp. 693-699
    • Eldridge, S.E.1    Walter, C.D.2
  • 9
    • 0038800541 scopus 로고    scopus 로고
    • Timing Attack: What Can Be Achieved by a Powerful Adversary?
    • A. Barbé, E.C. van der Meulen, and P. Vanroose, editors, pages 63-70, May
    • Gael Hachez, François Koeune, and Jean-Jacques Quisquater. Timing Attack: What Can Be Achieved by a Powerful Adversary? In A. Barbé, E.C. van der Meulen, and P. Vanroose, editors, The 20th symposium on Information Theory in the Benelux, pages 63-70, May 1999.
    • (1999) The 20Th Symposium on Information Theory in the Benelux
    • Hachez, G.1    Koeune, F.2    Quisquater, J.-J.3
  • 11
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    • Timing Attack on Implementations of Dié-Hellman, RSA, DSS and other systems
    • In Neil Kobliz, editor, Springer-Verlag, August
    • Paul Kocher. Timing Attack on Implementations of Dié-Hellman, RSA, DSS and other systems. In Neil Kobliz, editor, Advances in Cryptology-CRYPTO ‘96, volume 1109 of LNCS, pages 104-113. Springer-Verlag, August 1996.
    • (1996) Advances in Cryptology-Crypto ‘96, Volume 1109 of LNCS , pp. 104-113
    • Kocher, P.1
  • 14
    • 84966243285 scopus 로고
    • Montgomery. Modular Multiplication Without Trial Division
    • Peter L. Montgomery. Modular Multiplication Without Trial Division. Mathemat-ics of Computation, 44(170):519-521, April 1985.
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  • 15
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    • Procédé de Codage selon la Méthode dite RSA, par un Microcontr^oleur et Dispositifs Utilisant ce Procédé
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    • Jean-Jacques Quisquater. Procédé de Codage selon la Méthode dite RSA, par un Microcontr^oleur et Dispositifs Utilisant ce Procédé. Demande de brevet français. (Dépôt numéro: 90 02274), February 1990.
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    • Quisquater, J.-J.1
  • 17
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    • Walter. Montgomery Exponentiation Needs no Final Subtractions
    • Colin D. Walter. Montgomery Exponentiation Needs no Final Subtractions. Electronics Letters, 35(21):1831-1832, October 1999.
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    • Colin, D.1
  • 18
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    • Colin D. Walter. Montgomery’s Multiplication Technique: How to Make It Smaller and Faster. In Cétin K. Koç and Christof Paar, editors, Cryptographic Hardware and Embedded Systems-CHES ‘99, volume 1717 of LNCS, pages 80-93. Springer-Verlag, August 1999.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.